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In this lecture, we will set up paging and remap our kernel to the higher part of the memory locations. 

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As you see in the memory map, 

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the kernel is running at address 200000 so far. 

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What we want to do is we are going to do map the kernel to the area shown here. 

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The large chunk of memory addresses in red 

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is non canonical address. The user programs will run in the lower part of the memory location. 

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So the non-canonical address area separates the kernel and user space.  

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So how to do it?

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This requires us to set up paging. When we enter the 64-bit mode, paging mechanism is enabled. 

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But the way we setup paging is making the virtual address 

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equal to physical address.

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Therefore we need to reconfigure it to do the job.

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OK, let's see what is paging and how to set it up.

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Paging allows us to remap data into physical address space using fixed size blocks called physical pages. 

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The page sizes the processor supports in 64-bit mode are 1g pages, 2m pages 

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and 4k pages. 

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In our system, we use 1g and 2m pages.

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So the memory address can be divided into different sets of pages. And page translation will use data structure

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called page translation table to translate virtual pages into physical pages. 

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As you see, we translate it into different pages, or we can translate it into the same page 

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which is used in the kernel so far. 

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Let's see the translation table.

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The translation table is actually a hierarchical data structure which means we will have several tables. 

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The virtual address is broken into three pieces in this example. The sign extension is not used here. 

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We start from Page map level 4 table. 

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The table is pointed to by the register cr3. 

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Then the 9-bit pml4 value is used as an index to locate the corresponding item in the table. 

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Each entry here includes the address of the next lower level table. Page directory pointer table in this example

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.

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Then the value of pdp is used as an index to locate the correct entry. 

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And the entry now points to the physical page which is 1g page. 

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The page offset is used as the offset into the physical page and now we get physical address. 

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This is a one gigabyte page translation

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.

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Let's move to  2m page translation. 

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The virtual address is now divided into more fields. The process is pretty much the same. 

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Register cr3 holds the address of page map level 4 table and PML4 acts as an index to the entry 

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which points to the next level table. 

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Then the value of pdp is used to locate the corresponding entry. 

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At this point we have one more level. 

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The next level table is called page directory table 

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and we can find the entry using pd value. The entry points to the 2m physical page. 

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And the page offset is the offset into the page. 

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The 4k page translation is the same except that it requires one more level of translation table

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.

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And note that the addresses used in register cr3 and table entries are all physical addresses.

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Alright this is the simplified process of translation. 

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What we are going to do next is we are going to talk about the table entries, since setting up paging in our system 

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is setting those entries. 

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These three table entries are used for 1g page translation. There are other attributes 

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in the entry that are not shown in the slide. 

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What is shown here is enough for our memory module to work properly. 

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The first entry is stored in register cr3.  

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So we simply save the address of the page map level 4 table to the register.

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The next entry is page map level 4 table entry which holds the address of page directory pointer table

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.

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In addition, we have some attributes in the entry. The bit p represents present. If the bit is 0, 

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it means the page table or page is not in the memory and page fault exception will generate 

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if we access it.

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So we set it to 1.

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The w means read write with 0 being read only and 1 being read and write. 

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The bit u means user. If the bit is 0, 

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it means that the user program in ring3 is not allowed to access the page. 

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If the bit is 1, then the user program in ring3 can access the page.  

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Ok, move to the next entry which is page directory pointer table entry.  

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The table entry holds the address of the 1g physical page. 

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The p w and u bits have the same meaning. 

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And the bit 7 must be 1 indicating a 1g physical page translation. 

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OK, let's take a look at 2mb page translation.

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The first two entries are the same as those in the 1g page translation. The third entry is pointing to 

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page directory table instead of 1g physical page. 

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So the bit 7 is now cleared. 

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The last entry points to the 2m physical page and the bit 7 is set to 1 

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indicating a 2m physical page translation. 

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OK, next we will do a recap on the code of setting up paging in the loader file and then remap our kernel

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to the higher part of the memory location.  Let's get started.

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Opens the loader file.

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The code here is for setting up paging. First off, we zero the 10000 bytes of memory region starting from 70000. 

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The value of cr3 is 70000. 

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So the address of page map level 4 table is 70000. 

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Each entry in the page map level 4 table represent 512g and we only implement the low 1g.  

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so we set up the first entry of the table.

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Each table takes up 4k space, since the table include 512 entries 

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with each entry being 8 bytes. 

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So the next table address is set to 71000 and the lower 3 bits are the attribute we need to set 

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.

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We want the memory to be readable and writable and only accessed by the kernel. Also, we set present bit to 1. 

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So the value is 3.  The value we assign to the entry is 71003. 

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The reason we set the value 7 instead of 3 is that in the previous lectures, 

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we accessed the memory when we jumped to the ring3 and write the screen buffer to print message on the screen. 

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If we set it to 3 at that time, 

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the cpu exception will generate.

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For now, we do the initialization in the kernel, so we don’t need to make the memory accessible in ring3 

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.

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Ok let’s continue. In the page directory pointer table, 

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we also set up the first entry.  Because each entry here points to 1g physical page. 

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This is exactly the entry we want to set. 

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The base address of the physical page is set to 0 

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and the attribute here is set to the same value 3.

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don’t forget to set the bit 7 to 1 to indicate this is 1g physical page translation

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.

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Ok, next thing we will do is we are going to remap our kernel.  The virtual address the kernel currently running at 

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is 200000.

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And the address we want the kernel to remap to is the virtual address showing here as we have seen it in the slide. 

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In this example we map the virtual address to the same 1g physical page.

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So the two translations we set up will eventually point to the same physical page where the kernel is stored 

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.

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Which means we just change the virtual address of the kernel by simply setting up the table 

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instead of copying the kernel. 

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Alright,

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with the virtual address we want, 

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we need to do a simple calculation. Apparently, this virtual address is way beyond 1g

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.

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So we retrieve the 9-bit page map level 4 value located at the bit 39 of the address. 

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We get the index by shifting right the value 39 bits.  Next we clear other bits using and instruction. 

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And now we get the 9-bit index value. 

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What we are going to do next is using the index to locate the corresponding entry in the table. 

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Each entry takes up 8 bytes, 

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so we multiply the index by 8. 

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This is the entry we want. 

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The value we want to assign is 72003 which means the next level table is at 72000 

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and the attributes are the same as we saw before. 

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As you can see the index bits of page directory pointer table entry is 0. 

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So the first entry in this table is the entry we need to set. Because we want to remap the kernel to the virtual address 

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without really copying the kernel elsewhere. 

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So we set the 1g physical page to the same physical page where the kernel locates. 

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There is one more thing to do before we finish the loader. 

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Since the kernel is relocated to the new virtual address which is far away from the loader, 

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we need to save it to the 64-bit register and jump to kernel. 

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So we move the virtual address to rax

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And then jmp rax

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OK, let's move to the kernel file.

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In the kernel file,

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the first thing we are going to do is change the load gdt instruction. Since the kernel is running 

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at the high memory location. 

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The memory address of gdt pointer is also at this memory area. 

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We cannot reference it using 32-bit address. 

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Instead, we move the address in register rax and load rax. 

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So we copy address

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of gdt pointer to rax.

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and load rax

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If you want to reference gdt pointer using rip-relative addressing here, it will be fine since our kernel is really small. 

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In this example we simply move to the register. 

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The same thing happens with set tss.

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We move the address of tss descriptor to rdi and access the memory locations using rdi instead. 

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Next one is kernel entry.

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Because push instruction can only push 32-bit immediate value which cannot represent the address of kernel entry. 

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We need to move the address to the 64-bit register and then push the value on the stack

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.

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we move the address of kernel entry to rax

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then push rax

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Next one is stack address. The stack address copied to the rsp register is at the low memory location. 

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We change it to the high memory address which points to the same physical address.  Remember the virtual address 

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,

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and virtual address 0 we set up in the loader file point to the same physical page.  

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So adding 200000 to the new virtual address is the new stack address we want

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.

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And don’t forget to change the kernel stack in the TSS. 

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we also add it with the virtual address.  

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Alright that’s it for the kernel file. 

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In the linker script, 

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we specify the linker to link the kernel at the desired address. To do it, we use . 

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which means the current address.  And we assign the base address to it. In the loader file, we jump to the new virtual address.

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So this is the address we use here. And now the following sections will be linked at this address. 

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OK, let's build the project and test it out.

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Because we only change the memory address of the program, the message printed on the screen remains the same. 

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But the virtual address for our system is different from those in previous lectures. 

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OK, that's it for this lecture.